VLSI design techniques for anolog and digital circuits (Record no. 170401)
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| 000 -LEADER | |
|---|---|
| fixed length control field | 00419nam a2200133Ia 4500 |
| 008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION | |
| fixed length control field | 220217s9999||||xx |||||||||||||| ||und|| |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER | |
| International Standard Book Number | 0-07-100728-8 |
| 082 ## - DEWEY DECIMAL CLASSIFICATION NUMBER | |
| Classification number | 621.382 GEI |
| 100 ## - MAIN ENTRY--PERSONAL NAME | |
| Personal name | Geiger, Randall, L Allen, Phillip, E. & Strader, Noel, R |
| 9 (RLIN) | 1917 |
| 245 #0 - TITLE STATEMENT | |
| Title | VLSI design techniques for anolog and digital circuits |
| 260 ## - PUBLICATION, DISTRIBUTION, ETC. | |
| Place of publication, distribution, etc. | Tata Mcgraw hill |
| Name of publisher, distributor, etc. | Newyork |
| Date of publication, distribution, etc. | 1990 |
| 300 ## - PHYSICAL DESCRIPTION | |
| Other physical details | 828 |
| 650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| Topical term or geographic name entry element | CIRCUITRY |
| Withdrawn status | Lost status | Damaged status | Not for loan | Collection code | Home library | Current library | Date acquired | Total Checkouts | Full call number | Barcode | Date last seen | Date last checked out | Price effective from | Koha item type |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Electronics and Communication Engineering | Central Library | Central Library | 02/18/2022 | 1 | 621.382 GEI | 5590 | 11/30/2022 | 11/02/2022 | 02/18/2022 | Books |