CMOS circuit design, layout, and simulation (Record no. 178296)
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| 000 -LEADER | |
|---|---|
| fixed length control field | 00401nam a2200145Ia 4500 |
| 008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION | |
| fixed length control field | 220217s9999||||xx |||||||||||||| ||und|| |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER | |
| International Standard Book Number | 978-81-265-2037-4 |
| 082 ## - DEWEY DECIMAL CLASSIFICATION NUMBER | |
| Classification number | 621.381 5 BAK |
| 100 ## - MAIN ENTRY--PERSONAL NAME | |
| Personal name | Baker, Jacob, R |
| 9 (RLIN) | 2918 |
| 245 #0 - TITLE STATEMENT | |
| Title | CMOS circuit design, layout, and simulation |
| 250 ## - EDITION STATEMENT | |
| Edition statement | 2nd |
| 260 ## - PUBLICATION, DISTRIBUTION, ETC. | |
| Place of publication, distribution, etc. | John wiely & sons Inc. |
| Name of publisher, distributor, etc. | New York |
| Date of publication, distribution, etc. | 2009 |
| 300 ## - PHYSICAL DESCRIPTION | |
| Other physical details | 429 |
| 650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| Topical term or geographic name entry element | CIRCUITRY |
| Withdrawn status | Lost status | Damaged status | Not for loan | Collection code | Home library | Current library | Shelving location | Date acquired | Full call number | Barcode | Date last seen | Price effective from | Koha item type |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Electronics and Communication Engineering | Central Library | Central Library | Book Cart | 02/18/2022 | 621.381 5 BAK | 13485 | 02/18/2022 | 02/18/2022 | Books |