Bergeron, Janick  <br/><br/>
Writing test benches using system verilog  

 - Springar publications   New Delhi   2009 
 - XXVI, 412   995 
<br/><br/><label>ISBN: </label>9780387292212 
<br/><br/><label>Subjects--Topical Terms: </label><br/>VHDL 
<br/><br/><label>Dewey Class. No.: </label>621.392 BER