TY  - BOOK
AU  - Padmanabhan, T.R and Sundari, Bala, S.T 
TI  - Design through verilog HDL 
SN  - 9788126519316
U1  - 621.392 PAD  
PY  - 2010///
CY  - Wiley india 
PB  - New Delhi 
KW  - VHDL
ER  -